1. Field of the Invention
The present invention relates to a magnetic memory device having a magnetoresistive device and a method of reading the same.
2. Background Art
Conventionally, as general memories used for an information processor such as a computer or a mobile communication device, volatile memories such as a DRAM (Dynamic Random Access Memory) and an SRAM (Static RAM) are used. If current is not always supplied to the volatile memories, all of information in the volatile memories is lost. Consequently, means for storing information, that is, a nonvolatile memory has to be provided, and a flash EEPROM, a hard disk device, or the like is used. In the nonvolatile memories, as the speed of information processing increases, increase in access speed is an important subject. Further, as a portable information device is being rapidly spread and its performance is becoming higher, development of an information device aiming at so-called ubiquitous computing such that information processing can be performed everywhere at any time is rapidly being progressed. Development of a higher-speed nonvolatile memory as a key device in development of such a device is in strong demand.
As a technique effective to increase the speed of the nonvolatile memory, an MRAM (magnetic random access memory) is known. In the MRAM, each of storage cells arranged in a matrix is constructed by a magnetic device having two ferromagnetic layers. In each of the storage cells, by making the magnetization directions of the ferromagnetic layers of the device parallel or anti-parallel with the axis of easy magnetization in correspondence with binary information of “0” or “1”, information is stored. The resistance value in a specific direction of the magnetic device varies according to whether the magnetization direction of the ferromagnetic layer is parallel or anti-parallel. Therefore, by detecting the resistance which varies according to information as a change in current or voltage, information is read from a storage cell. Since the MRAM operates on the basis of such a principle, it is important that the resistance change ratio is as high as possible to perform stable writing and reading in the MRAM.
The MRAM currently used in practice utilizes the giant magneto-resistive (GMR) effect. The GMR effect is a phenomenon such that when two magnetic layers are disposed so that their axes of easy magnetization are parallel with each other, in the case where the magnetization directions of the layers are parallel with the axis of easy magnetization, the resistance value becomes the minimum and in the case where the magnetization directions are anti-parallel with the axis of easy magnetization, the resistance value becomes the maximum. An MRAM using a GMR device (hereinafter, described as GMR-MRAM) is disclosed in, for example, U.S. Pat. No. 5,343,422.
The GMR-MRAM has a coercive force difference type (pseudo spin valve type) and an exchange bias type (spin valve type). In the MRAM of the pseudo spin valve type, the GRM device is constructed by stacking two ferromagnetic layers and a nonmagnetic layer sandwiched between the two ferromagnetic layers and, by using the difference between the coercive forces of the two ferromagnetic layers, information is written/read. In the MRAM of the spin valve type, two ferromagnetic layers are constructed by a pinned layer whose magnetization direction is pinned and a free layer whose magnetization direction can change according to an external magnetic field. The pinned layer is antiferromagnetic-coupled to an antiferromagnetic layer over the nonmagnetic layer, so that its magnetization direction is stably pinned. The resistance change rate of the GMR device of the pseudo spin valve type having a stacked structure of NiFe/Cu/Co is about 6 to 8% and that of the GMR device of the spin valve type having a stacked structure of PtMn/CoFe/Cu/CoFe is about 10%. Consequently, a sufficient read output obtained by detecting the resistance difference as the current or voltage difference is not yet obtained, and it is difficult to improve storage capacity and access speed.
With respect to this point, the resistance change rate of an MRAM using a tunneling magneto-resistive (TMR) effect (hereinafter, abbreviated as TMR-MRAM) can be largely increased. The TMR effect is a phenomenon such that the tunnel current passing through an insulating layer changes in accordance with relative angles of the magnetization directions of two ferromagnetic layers stacked while sandwiching a very-thin insulating layer (a pinned layer whose magnetization direction is pinned and a magneto-sensitive layer, that is, a free layer whose magnetization direction can be changed). When the magnetization directions of the two ferromagnetic layers are parallel with each other, the tunnel current becomes the maximum (the resistance value of the cell becomes the minimum). In the case where the magnetization directions are anti-parallel with each other, the tunnel current becomes the minimum (the resistance value of the cell becomes the maximum). As a concrete example of the TMR device, a TMR device having a stacked structure of CoFe/aluminum oxide/CoFe is known. The resistance change rate of the TMR device is 40% or higher.
Since the resistance of the TMR device is high, the TMR-MRAM can be easily matched with a semiconductor device such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). From the above advantages, the TMR-MRAM can easily obtain a higher output as compared with the GMR-MRAM, and improvement in storage capacity and access speed is expected. TMR-MRAM techniques disclosed in U.S. Pat. No. 5,629,922 and Japanese Patent Laid-open No. Hei 9-91949 and the like are known.
The TMR-MRAM employs a method of writing information by changing the magnetization directions of the ferromagnetic layers by using current magnetic field led by current passed to the conductor. By the method, binary information is stored in correspondence with the relative magnetization directions (parallel or anti-parallel) of the ferromagnetic layers. It employs a method of reading stored information by passing current in the direction perpendicular to the layer surface and detecting a tunnel current value or tunnel resistance. In this case, the difference between the relative magnetization directions (parallel or anti-parallel) of the ferromagnetic layers appears as the difference between output current values or cell resistance values.
A cell array structure in which a plurality of TMR devices are connected in parallel on a data line and a semiconductor device for selection is disposed for each TMR device, and a cell array structure in which each of TMR devices is disposed for each data line are proposed. As the semiconductor device, a diode constructed by short-circuiting the gate and drain of a MOSFET or FET, a pn junction diode, a Schottky diode, or the like is used. Another structure is also proposed in which TMR devices are disposed in matrix by using row data lines and column data lines and a transistor for selection is disposed for each data line.
Among the structures, a structure having the most excellent characteristic from the viewpoint of power efficiency in reading operation is the structure in which the semiconductor device for selection is disposed for each of the TMR devices. In the case where the characteristics of the semiconductor devices are various, noise which occurs due to the variations is ignorable. In addition, when noise connected to the data line, noise caused by variations in the characteristics of the sense amplifiers, and noise of peripheral circuits entering from the power source circuit are also considered, there is the possibility that the S/N ratio of the output voltage of a storage cell is only a few dB.
Therefore, to improve the S/N ratio of a read output, the cell array of the TMR-MRAM has been improved as follows.
A method of comparing an output voltage V of a selected storage cell with a reference voltage Vref and amplifying the difference voltage Vsig is often used. The first purpose of the differential amplification is to remove noise which occurs in a data line pair to which the storage cell is connected. The second purpose is to remove an offset of the output voltage caused by characteristic variations in semiconductor devices for driving sense line or for cell selection. However, a circuit for generating the reference voltage Vref is realized by a circuit using a dummy cell and a semiconductor device and characteristic variations of the devices exist between the circuit and the storage cell. Consequently, it is theoretically impossible to completely remove the offset of the output voltage.
As a method of solving the problem, a method of constructing a storage cell by a pair of TMR devices and amplifying the difference between outputs of the devices in the pair is generally widely known. In the method, information is written so that the magnetization directions of magneto-sensitive layers of the paired TMR devices are always anti-parallel with each other. To be specific, data is written in a complementary manner so that the magnetization of the magneto-sensitive layer and that of the pinned layer are parallel with each other in one of the devices, and the magnetization directions in the other device are anti-parallel with each other. The difference between outputs of the two devices is amplified and the amplified data is read, thereby removing common-mode noise and improving the S/N ratio. Such circuit configurations of the differential amplification type are disclosed in Japanese Patent Laid-Open Nos. 2001-236781 and 2001-266567, ISSCC 2000 Digest paper TA7.2, and the like.
More concretely, in techniques disclosed in Japanese Patent Laid-Open Nos. 2001-236781 and 2001-266567, one ends of first and second TMR devices constructing a storage cell are separately connected to first and second data lines in a pair, and the other ends are connected to a bit line via the same semiconductor device for cell selection. A word line is connected to the semiconductor device for cell selection. Information is read by giving a potential difference between the bit line and the first and second data lines while maintaining the first and second data lines to be equipotential and using, as an output, the difference value between amounts of currents flowing in the first and second data lines.
Generally in the differential amplification methods, however, variations in resistance values of paired TMR devices are an issue. The TMR devices have variations in resistance values which occur in a manufacturing process, and a current error caused by the variations cannot be avoided. Due to this, in spite of the configuration that one ends of the first and second TMR device are separately connected to the first and second data lines and the other ends are connected to the bit line via the same semiconductor device for cell selection, deterioration in the S/N ratio of an output signal due to variations in resistance values has not been solved yet.
In the above wiring structure, a number of TMR devices are connected to the first and second data lines, and semiconductor devices for cell selection of the number equal to the number of cells in the bit line direction are connected to the third bit line, thereby constructing a matrix of storage cells. Consequently, to obtain a stable read signal output, it is necessary to sufficiently suppress resistance variations among the TMR devices connected to each data line and characteristic variations among the semiconductor devices for cell selection connected to the same bit line. However, the reading method which gives an equipotential voltage difference between the first and second data lines cannot suppress the variations in theory. There is, consequently, a problem such that it is extremely difficult to take a countermeasure against noise which occurs due to the variations.
For such reasons, although countermeasures have been proposed one after another, in a conventional MRAM, the S/N ratio of a read signal cannot be sufficiently improved. As a result, in spite of the fact that the resistance change rate of the TMR device reaches about 40%, a sufficient output voltage is not obtained in reality. That is, the existing memory structure already has the problem in operation stability such as read precision. Moreover, it is expected that the memory structure is not ready for future increase in packing density of a memory.
Further, as described above, although the reading method of the TMR-MRAM and the configuration of the read circuit have been being variously devised, the structure of the TMR device itself has not been particularly improved.
Since the number of parts such as semiconductor devices built in the read circuit increases as the packing density of a memory increases, it is concerned that the power consumption of the whole memory device increases considerably.